From: Valentine Fatiev <valentinef@nvidia.com>
Subject: [PATCH] BACKPORT:
 drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c

Change-Id: Ie5decc4c71e2dcc52b33296b2a6e29b1e42d1ede
---
 .../ethernet/mellanox/mlx5/core/en/devlink.c  | 67 ++++++++++++++++++-
 1 file changed, 65 insertions(+), 2 deletions(-)

--- a/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/devlink.c
@@ -4,6 +4,7 @@
 #include "en/devlink.h"
 #include "eswitch.h"
 
+#if defined(HAVE_DEVLINK_PORT_ATRRS_SET_GET_2_PARAMS) || defined(HAVE_DEVLINK_PORT_ATRRS_SET_GET_7_PARAMS)
 static void
 mlx5e_devlink_get_port_parent_id(struct mlx5_core_dev *dev, struct netdev_phys_item_id *ppid)
 {
@@ -13,14 +14,20 @@ mlx5e_devlink_get_port_parent_id(struct
 	ppid->id_len = sizeof(parent_id);
 	memcpy(ppid->id, &parent_id, sizeof(parent_id));
 }
+#endif
 
+#ifdef HAVE_DEVLINK_PORT_ATRRS_SET_GET_SUPPORT
 int mlx5e_devlink_port_register(struct mlx5e_priv *priv)
 {
 	struct devlink *devlink = priv_to_devlink(priv->mdev);
-	struct devlink_port_attrs attrs = {};
-	struct netdev_phys_item_id ppid = {};
 	struct devlink_port *dl_port;
 	unsigned int dl_port_index;
+#ifdef HAVE_DEVL_PORT_REGISTER //forward port
+	int ret;
+#endif
+#ifdef HAVE_DEVLINK_PORT_ATRRS_SET_GET_2_PARAMS
+	struct devlink_port_attrs attrs = {};
+	struct netdev_phys_item_id ppid = {};
 
 	if (mlx5_core_is_pf(priv->mdev)) {
 		attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;
@@ -40,22 +47,77 @@ int mlx5e_devlink_port_register(struct m
 	dl_port = mlx5e_devlink_get_dl_port(priv);
 	memset(dl_port, 0, sizeof(*dl_port));
 	devlink_port_attrs_set(dl_port, &attrs);
+#else
+	dl_port = mlx5e_devlink_get_dl_port(priv);
+	memset(dl_port, 0, sizeof(*dl_port));
+	if (mlx5_core_is_pf(priv->mdev)) {
+#ifdef HAVE_DEVLINK_PORT_ATRRS_SET_GET_7_PARAMS
+		struct netdev_phys_item_id ppid = {};
 
+		if (MLX5_ESWITCH_MANAGER(priv->mdev))
+			mlx5e_devlink_get_port_parent_id(priv->mdev, &ppid);
+#endif
+		dl_port_index = mlx5_esw_vport_to_devlink_port_index(priv->mdev,
+								     MLX5_VPORT_UPLINK);
+		devlink_port_attrs_set(dl_port,
+				DEVLINK_PORT_FLAVOUR_PHYSICAL,
+				mlx5_get_dev_index(priv->mdev),
+				false, 0
+#ifdef HAVE_DEVLINK_PORT_ATRRS_SET_GET_7_PARAMS
+				,&ppid.id[0], ppid.id_len
+#endif
+		);
+	} else {
+		dl_port_index = mlx5_esw_vport_to_devlink_port_index(priv->mdev, 0);
+		devlink_port_attrs_set(dl_port,
+				DEVLINK_PORT_FLAVOUR_VIRTUAL,
+				0, false , 0
+#ifdef HAVE_DEVLINK_PORT_ATRRS_SET_GET_7_PARAMS
+				,NULL, 0
+#endif
+		);
+	}
+#endif
+#ifdef HAVE_DEVL_PORT_REGISTER //forward port
+	if (!(priv->mdev->priv.flags & MLX5_PRIV_FLAGS_MLX5E_LOCKED_FLOW))
+		devl_lock(devlink);
+	ret = devl_port_register(devlink, dl_port, dl_port_index);
+	if (!(priv->mdev->priv.flags & MLX5_PRIV_FLAGS_MLX5E_LOCKED_FLOW))
+		devl_unlock(devlink);
+
+	return ret;
+#else
 	return devlink_port_register(devlink, dl_port, dl_port_index);
+#endif
 }
 
+#ifndef HAVE_NETDEV_DEVLINK_PORT
 void mlx5e_devlink_port_type_eth_set(struct mlx5e_priv *priv)
 {
 	struct devlink_port *dl_port = mlx5e_devlink_get_dl_port(priv);
 
+#ifdef HAVE_DEVLINK_PORT_TYPE_ETH_SET_GET_1_PARAM
+	devlink_port_type_eth_set(dl_port);
+#else
 	devlink_port_type_eth_set(dl_port, priv->netdev);
+#endif
 }
+#endif
 
 void mlx5e_devlink_port_unregister(struct mlx5e_priv *priv)
 {
 	struct devlink_port *dl_port = mlx5e_devlink_get_dl_port(priv);
+#ifdef HAVE_DEVL_PORT_REGISTER //forward port
+	struct devlink *devlink = priv_to_devlink(priv->mdev);
 
+	if (!(priv->mdev->priv.flags & MLX5_PRIV_FLAGS_MLX5E_LOCKED_FLOW))
+		devl_lock(devlink);
+	devl_port_unregister(dl_port);
+	if (!(priv->mdev->priv.flags & MLX5_PRIV_FLAGS_MLX5E_LOCKED_FLOW))
+		devl_unlock(devlink);
+#else
 	devlink_port_unregister(dl_port);
+#endif
 }
 
 struct devlink_port *mlx5e_get_devlink_port(struct net_device *dev)
@@ -67,3 +129,4 @@ struct devlink_port *mlx5e_get_devlink_p
 
 	return mlx5e_devlink_get_dl_port(priv);
 }
+#endif
