.\" Automatically generated by Pandoc 1.16.0.2
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.TH "mlx5dv_reg_dmabuf_mr" "3" "" "" ""
.hy
.SH NAME
.PP
mlx5dv_reg_dmabuf_mr \- Register a dma\-buf based memory region (MR)
.SH SYNOPSIS
.IP
.nf
\f[C]
#include\ <infiniband/mlx5dv.h>

struct\ ibv_mr\ *mlx5dv_reg_dmabuf_mr(struct\ ibv_pd\ *pd,\ uint64_t\ offset,
\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ size_t\ length,\ uint64_t\ iova,\ int\ fd,
\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ int\ access,\ int\ mlx5_access)
\f[]
.fi
.SH DESCRIPTION
.PP
Register a dma\-buf based memory region (MR), it follows the
functionality of \f[I]ibv_reg_dmabuf_mr()\f[] with the ability to supply
specific mlx5 access flags.
.SH ARGUMENTS
.TP
.B \f[I]pd\f[]
The associated protection domain.
.RS
.RE
.TP
.B \f[I]offset\f[]
The offset of the dma\-buf where the MR starts.
.RS
.RE
.TP
.B \f[I]length\f[]
.IP
.nf
\f[C]
The\ length\ of\ the\ MR.
\f[]
.fi
.RS
.RE
.TP
.B \f[I]iova\f[]
Specifies the virtual base address of the MR when accessed through a
lkey or rkey.
It must have the same page offset as \f[I]offset\f[] and be aligned with
the system page size.
.RS
.RE
.TP
.B \f[I]fd\f[]
The file descriptor that the dma\-buf is identified by.
.RS
.RE
.TP
.B \f[I]access\f[]
The desired memory protection attributes; it is either 0 or the bitwise
OR of one or more of \f[I]enum ibv_access_flags\f[].
.RS
.RE
.TP
.B \f[I]mlx5_access\f[]
A specific device access flags, it is either 0 or the below.
.RS
.PP
\f[I]MLX5DV_REG_DMABUF_ACCESS_DATA_DIRECT\f[] if set, this MR will be
accessed through the Data Direct engine bonded with that RDMA device.
.RE
.SH RETURN VALUE
.PP
Upon success returns a pointer to the registered MR, or NULL if the
request fails, in that case the value of errno indicates the failure
reason.
.SH SEE ALSO
.PP
\f[I]ibv_reg_dmabuf_mr(3)\f[],
\f[I]mlx5dv_get_data_direct_sysfs_path(3)\f[]
.SH AUTHOR
.PP
Yishai Hadas <yishaih@nvidia.com>
