/* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
/*
 * Copyright (c) 2020, Mellanox Technologies. All rights reserved.
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */
#ifndef __MLXBF_TMFIFO_REGS_H__
#define __MLXBF_TMFIFO_REGS_H__

#ifdef __ASSEMBLER__
#define _64bit(x) x
#else /* __ASSEMBLER__ */
#define _64bit(x) x ## ULL
#endif /* __ASSEMBLER */

#include <linux/types.h>

#define TMFIFO_TX_DATA 0x0000

#define TMFIFO_TX_STS 0x0008
#define TMFIFO_TX_STS__LENGTH 0x0001

#define TMFIFO_TX_STS__COUNT_SHIFT 0
#define TMFIFO_TX_STS__COUNT_WIDTH 9
#define TMFIFO_TX_STS__COUNT_RESET_VAL 0
#define TMFIFO_TX_STS__COUNT_RMASK 0x1ff
#define TMFIFO_TX_STS__COUNT_MASK  0x1ff

#define TMFIFO_TX_CTL 0x0010
#define TMFIFO_TX_CTL__LENGTH 0x0001

#define TMFIFO_TX_CTL__LWM_SHIFT 0
#define TMFIFO_TX_CTL__LWM_WIDTH 8
#define TMFIFO_TX_CTL__LWM_RESET_VAL 128
#define TMFIFO_TX_CTL__LWM_RMASK 0xff
#define TMFIFO_TX_CTL__LWM_MASK  0xff

#define TMFIFO_TX_CTL__HWM_SHIFT 8
#define TMFIFO_TX_CTL__HWM_WIDTH 8
#define TMFIFO_TX_CTL__HWM_RESET_VAL 128
#define TMFIFO_TX_CTL__HWM_RMASK 0xff
#define TMFIFO_TX_CTL__HWM_MASK  0xff00

#define TMFIFO_TX_CTL__MAX_ENTRIES_SHIFT 32
#define TMFIFO_TX_CTL__MAX_ENTRIES_WIDTH 9
#define TMFIFO_TX_CTL__MAX_ENTRIES_RESET_VAL 256
#define TMFIFO_TX_CTL__MAX_ENTRIES_RMASK 0x1ff
#define TMFIFO_TX_CTL__MAX_ENTRIES_MASK  _64bit(0x1ff00000000)

#define TMFIFO_RX_DATA 0x0000

#define TMFIFO_RX_STS 0x0008
#define TMFIFO_RX_STS__LENGTH 0x0001

#define TMFIFO_RX_STS__COUNT_SHIFT 0
#define TMFIFO_RX_STS__COUNT_WIDTH 9
#define TMFIFO_RX_STS__COUNT_RESET_VAL 0
#define TMFIFO_RX_STS__COUNT_RMASK 0x1ff
#define TMFIFO_RX_STS__COUNT_MASK  0x1ff

#define TMFIFO_RX_CTL 0x0010
#define TMFIFO_RX_CTL__LENGTH 0x0001

#define TMFIFO_RX_CTL__LWM_SHIFT 0
#define TMFIFO_RX_CTL__LWM_WIDTH 8
#define TMFIFO_RX_CTL__LWM_RESET_VAL 128
#define TMFIFO_RX_CTL__LWM_RMASK 0xff
#define TMFIFO_RX_CTL__LWM_MASK  0xff

#define TMFIFO_RX_CTL__HWM_SHIFT 8
#define TMFIFO_RX_CTL__HWM_WIDTH 8
#define TMFIFO_RX_CTL__HWM_RESET_VAL 128
#define TMFIFO_RX_CTL__HWM_RMASK 0xff
#define TMFIFO_RX_CTL__HWM_MASK  0xff00

#define TMFIFO_RX_CTL__MAX_ENTRIES_SHIFT 32
#define TMFIFO_RX_CTL__MAX_ENTRIES_WIDTH 9
#define TMFIFO_RX_CTL__MAX_ENTRIES_RESET_VAL 256
#define TMFIFO_RX_CTL__MAX_ENTRIES_RMASK 0x1ff
#define TMFIFO_RX_CTL__MAX_ENTRIES_MASK  _64bit(0x1ff00000000)

#endif /* !defined(__MLXBF_TMFIFO_REGS_H__) */
